(In Japanese) LOFICイメージセンサに用いる小面積かつ高線形な列並列読み出し回路

2023 Aug

Authors 堀田遼太郎*、大倉俊介*、大谷愛*、立田一葵*
(*Ritsumeikan University)

IST 2023

As the world moves towards the Trillion Sensors Universe, it is required to make sensor hips smaller and to reduce chip costs in order to utilize a vast number of sensors.  In the case of CMOS image sensors, high-density MOS capacitors are often used in column readout circuits to reduce the readout circuit area.  However, the manufacturing process to realize a MOS capacitor with deep negative threshold voltage is added to prevent non-linearity from the readout circuit.  In this paper, a readout circuit that adds a small capacitor and switch is proposed to improve the linearity with a standard CMOS process.  According to SPICE simulation results, the proposed readout circuit improves the linearity by about 99% compared with the conventional readout circuit with a standard 0.18um CMOS process.