(In Japanese) A 4.6μm, 512×512, Ultra-Low Power Stacked Digital Pixel Sensor with Triple Quantization and 127dB Dynamic Range

2021 March

Authors Toshiyuki Isozaki, Kazuya Mori, Rimon Ikeno, Masayuki Uno, Ken Miyauchi, Isao Takayanagi, Junichi Nakamura, Lyle Bainbridge*, Andrew Berkovich*, Song Chen*, Wei Gao*, Tsung-Hsun Tsai* and Chiao Liu*
*Facebook Inc,

映像情報メディア学会 情報センシング研究会

We present a global shutter (GS), digital pixel sensor (DPS) that leverages stacked CMOS image sensor (CIS) technology to meet the ultra-low power, ultra-wide dynamic range (DR) requirements for battery-powered, always-on mobile computer vision (CV) applications. The DPS pixel is partitioned between two silicon layers via pixel level connections, has an in-pixel ADC, 10-bit SRAM, and 4.6µm pitch. We introduce a triple quantization (3Q) scheme that combines a time-to-saturation (TTS) quantization mode and two linear ADC modes within a single exposure to achieve 127dB intra-scene DR. The sensor has a 512×512 effective resolution and consumes 5.75mW in 3Q operation at 30fps.