Evolution of a 4.6 μm, 512×512, ultra-low power stacked digital pixel sensor for performance and power efficiency improvement

2023 May

Authors Rimon Ikeno, Kazuya Mori, Masayuki Uno, Ken Miyauchi, Toshiyuki Isozaki, Hirofumi Abe, Masato Nagamatsu, Isao Takayanagi, Junichi Nakamura, Shou-Gwo Wuu, Lyle Bainbridge, Andrew Berkovich*, Song Chen*, Ramakrishna Chilukuri*, Wei Gao*, Tsung-Hsun Tsai* and Chiao Liu*
(*Meta Reality Labs)

IISW 2023

We report improvement of a global
shutter, stacked digital pixel sensor with 512 × 512, 4.6
μm pixels featuring an overlapped triple quantization
scheme. It achieves an ultra-high dynamic range of 127
dB with reduced temporal noise and fixed pattern noise
by pixel-design tuning and layout optimization. The
new sensor chip achieves low power consumption of
5.8 mW, which is comparable to the original chip by
design and operation optimizations despite the newly
integrated voltage regulators for pixel power supply
and pixel-control signals in the same die size as the
original chip.