A 4.0μm Stacked Digital Pixel Sensor Operating in A Dual Quantization Mode for High Dynamic Range
2021 International Image Sensor Workshop (IISW)
This article presents a prototype 4.0μm stacked DPS operating in its dual quantization (2Q) to realize HDR. The 4.0μm DPS pixel is formed with two layers, a backside illuminated pinned photodiode (PD) pixel on the top layer and an in-pixel analog-to-digital conversion (ADC) circuit with 9-bit static random access memory (SRAM) on the bottom layer. A Cu-to-Cu hybrid bonding (HB) technology is used to connect the two layers via pixel-level interconnect. In the 2Q scheme, a time-stamp (TS) quantization and a linear ADC are performed sequentially in the same frame, which extends the dynamic range (DR) with a small number of ADC bits of 9. The DPS with a 1024 × 832 pixel array has achieved a single-exposure ultra HDR of 107 dB in a single frame.