Brillnics presented 3 papers at the 2017 IISW

Brillnics presented 3 papers at the 2017 International Image Sensor Workshop (IISW) that was held from May 30th till June 2nd in Hiroshima, Japan.


The first paper, “An 87dB Single Exposure Dynamic Range CMOS Image Sensor with a 3.0mm Triple Conversion Gain Pixel”, by Isao Takayanagi, et al., reports sensor architecture and performance of a 2M-pixel CMOS image sensor (BR0200) that features 87dB single exposure high dynamic range (SE HDR).  With the SE HDR scheme, the motion artifact with moving objects that could appear in the multiple exposure HDR (ME HDR) scheme cannot be generated.  Also, the advantage of offering higher SNR at high light levels over the ME HDR scheme was pointed out.


The second paper, “Back Side Illuminated High Dynamic Range 3.0μm Pixel Featuring Vertical p-n Junction Capacitance in A Deep Pinned Photodiode,” by K. Mori, et al., describes the pixel structure that can enhance photodiode full well capacity (FWC).  This pixel structure is used for BR0200.  With this pixel structure, 40ke- FWC has been obtained, though a pixel that yields 27ke- FWC for a balanced pixel performance is chosen for BR0200.


The third paper, “A Proposal of PUF Utilizing Pixel Variations in a CMOS Image Sensor,” by S. Okura, et al., proposes a CMOS image sensor with a physically unclonable function (CIS-PUF) in collaboration with Ritsumeikan University, Kyoto, Japan, which utilizes the pixel-to-pixel fixed pattern noise (PPFPN) as a fingerprint of each device.  It is expected that this PUF scheme will contribute to information security that will be required in future IoT environment.


Those papers can be found in the on-line library of the IISS/IISW website;

An 87dB Single Exposure Dynamic Range CMOS Image Sensor  with a 3.0µm Triple Conversion Gain Pixel

Back Side Illuminated High Dynamic Range 3.0μm Pixel Featuring Vertical p-n Junction Capacitance in A Deep Pinned Photodiode

A Proposal of PUF Utilizing Pixel Variations in the CMOS Image Sensor




Brillnics Product at ESEC

In cooperation with its partner company, Ryosan Co., Ltd., Brillnics is introducing its product line-ups at ESEC (Embedded Systems Expo) that is now being held at Tokyo BIG SIGHT (5/10/2017-5/12/2017), where you will find video images of SEHDR (Single Exposure High Dynamic Range) which is an important factor of Brillnics H3DRTM technology.

Please come to see our products at WEST 4-42 in BIG SIGHT WEST (at Ryosan’s booth)





Tokyo, Japan January 5, 2017 – Junichi Nakamura, CTO of Brillnics Inc. has been named an IEEE Fellow. He is being recognized his for contributions to the image sensor industry.


The IEEE Grade of Fellow is conferred by the IEEE Board of Directors upon a person with an outstanding record of accomplishments in any of the IEEE fields of interest. The total number selected in any one year cannot exceed one-tenth of one- percent of the total voting membership. IEEE Fellow is the highest grade of membership and is recognized by the technical community as a prestigious honor and an important career achievement.


During his career, Dr. Nakamura worked at Olympus Optical Co., Tokyo, Japan, Caltech’s Jet Propulsion Laboratory (JPL), CA, and the Photobit Japan Branch in Tokyo.  He joined Brillnics in 2014 as CTO, after serving as Manager of Japan Imaging Design Center, Micron Japan, Ltd and as Director of the Japan Design Center of Aptina Japan, LLC.


Since his time at JPL in the early 1990’s as a Distinguished Visiting Scientist, where he contributed to the modern CMOS image sensor’s early research, Dr. Nakamura has worked and led R&D teams in CMOS image sensor technology that is at the heart of nearly every digital camera and which has made a great impact on the daily life of people around the world.  Highlights include the development of the first CMOS image sensors for NHK’s 8K ultra-high definition TV (UHDTV) broadcasting cameras that were used for the 2012 London Olympic Games, and consumer mirror-less digital still cameras (DSC).


Dr. Nakamura is a Fellow of the Institute of Image Information and Television Engineers of Japan and received the Takayanagi Memorial Award in 2009 for his contribution to CMOS Image Sensor developments.  Also, he was Editor and a Contributor for a textbook “Image Sensors and Signal Processing for Digital Still Cameras”.

Press Release: BRV0200/0201

Brillnics Unveils 2-Megapixel BSI Starlight Sensors with Industry’s Leading Brillnics   H³DRTM Technology for Video Surveillance Applications

Tokyo, Japan and Hsinchu, Taiwan, January 1, 2017 – Brillnics Inc., a leading designer and developer of CMOS imaging sensor products today announced two new 1/2.7” 1080p digital-output color CMOS image sensors: BRV0200 (60fps) and BRV0201 (120fps). Built on high performance Back Side Illumination (BSI) process and Brillnics patented Brillnics H³DRTM technology, these two devices are designed for security/surveillance and high-end video applications.

“We see customers expecting high imaging quality under extremely low light for various video applications. Collaborating with strategic foundry partner, Brillnics uses BSI technology featuring high sensitivity, high angular response, and low noise.”, said Dr. Shou-Gwo Wuu, Chief Executive Officer of Brillnics Inc. “We are particularly excited about the introduction of single exposure HDR (SE HDR), which can significantly mitigate motion artifacts caused by moving objects. SE HDR allows the highest video fidelity in fast-moving scenes, such as in automotive applications.”

In comparison with most common approaches to obtaining high dynamic range (HDR), including a logarithmic response pixel, a linear-logarithmic response pixel, a dual photodiode pixel, or a multiple exposure HDR (ME HDR) scheme, Brillnics adopts the multiple exposure HDR scheme and/or single exposure HDR scheme. The SE HDR mode obtains two data from a same pixel. One is a lower response and the other a higher response, of which integration times are identical with no timing shift, unlike the ME HDR. Linearization using the two data is then performed on-chip, yielding 16bit digital signal or 12bit compressed digital signal.

The high dynamic range of the BRV0200/0201 in SE HDR mode is made possible by its very high low-light sensitivity and very high full well capacity. The very high low-light sensitivity comes from its high quantum efficiency (the ratio of generated signal electrons to incident photons per pixel) and low readout noise floor. Also, the very high full well capacity has been realized by our excellent pixel design and close collaboration with the strategic foundry partner.

Product Highlights

• Process: Backside Illumination
• Pixel Size: 3.0 um • Optical Format: 1/2.7” • Angular Response: 85% @ ±20°
• Max Frame Rate: 120fps, 12bit (BRV0201)
• Hybrid Modes HDR: MEHDR/SEHDR
• SE HDR: Dual conversion gain readout in single exposure time
• SE HDR >85dB and ME HDR 120dB • SNRmax: 44dB
• Power consumption: typ. 178mW at 60fps, 12bit

For more details, please contact Brillnics at